A downloadable game for Windows, Mac OS X, and Linux

Buy Now3.99€ EUR or more

Welcome to DLS, the digital logic simulator game.

The current version of the game includes:

  • Truth table levels where your goal is to build a circuit to match a given truth table, under certain restrictions (e.g. limited types of gates).
  • Sequential levels where your goal is to create a circuit to match a given timing graph.
  • Stream levels where you have to build a circuit to process several inputs streams and produce the desired outputs.
  • A powerful sandbox editor where you can build whatever circuit comes to mind! Includes a logic analyzer to debug your circuits, calculate propagation delays and/or find hazards and glitches. Create and organize components into packages and use them to create larger and better circuits.

To get an idea about what's possible to build with DLS, see our github repository of schematics

Follow DLS on Twitter

DISCLAIMER: This is an alpha version of the game. Although the simulator is capable of handling relatively complex circuits, you might find that certain configurations don't give the expected results. If this is the case, you can send us the schematic in question to find out what's going on and how we can fix the simulator.

Technical

DLS is a time-driven event-based multi-delay 3-value digital logic simulator.

  • Time-driven means that the circuit time is advanced forward based on a user-specified target speed, which is measured in circuit nanoseconds per real second (ns/s). The simulation will always advance to a new state if there are pending signals in the circuit's queue. This means that even unstable or asynchronous circuits can be correctly simulated.
  • Event-based means that a gate is simulated only if one of its inputs changes value. Otherwise the previous output is considered valid and used as input to all connected gates/components.
  • Multi-delay means that each build-in gate/component type has its own propagation delay which is always an integer greater than or equal to 1.
  • 3-value means that in addition to logic levels 0 and 1 there's an extra logic value (U for Undefined) which is used as both Z (high impedance) and X (undefined) signals, depending on its origin.

Third party libraries

DLS uses the following free software (in no particular order):

  1. GLFW - An OpenGL library (http://www.glfw.org/)
  2. bgfx - Cross-platform rendering library (https://github.com/bkaradzic/bgfx)
  3. nanovg - Antialiased 2D vector drawing library on top of OpenGL for UI and visualizations. (https://github.com/memononen/nanovg)
  4. zange - A single header ANSI C JSON parser (https://github.com/vurtun/zange)
  5. nanosvg - Simple stupid SVG parser (https://github.com/memononen/nanosvg)
  6. bnet - Message oriented networking library using TCP transport (https://github.com/bkaradzic/bnet)
  7. CrashRpt - A crash reporting system for Windows applications (http://crashrpt.sourceforge.net/)
  8. LuaJIT - a Just-In-Time Compiler for Lua (http://luajit.org/)
  9. Icons from Font Awesome - the iconic font and CSS toolkit (https://fortawesome.github.io/Font-Awesome/)
  10. Roboto font (http://www.dafont.com/roboto.font), Anonymous Pro Minus font (http://www.marksimonson.com/fonts/view/anonymous-p...)

We would like to thank their developers for building them and making them public/free.

Credits

Programming, testing: Jim Drygiannakis ( @jdryg)
Graphics/UI: Antonis Drygiannakis
Beta testing: Sam Swain, Richard Matthias, Josh Callebaut

Release history

v0.11.2 (2016-11-27)

  1. NEW: Added the total number of transistors in the current circuit to the Simulation/Circuit info panel.
  2. FIX: Fixed the description of the Tri-state buffer tutorial level about buses and Undefined values.
  3. FIX: When the Simulation/Circuit info panel was visible the Escape key didn't work (didn't bring up the Pause menu).

For details on previous versions, see Releases.txt or the sandbox manual.

More information

Published1 year ago
StatusIn development
PlatformsWindows, Mac OS X, Linux
Rating
(5)
AuthorMaking Art Studios
GenreSimulation
Tagscircuit, cpu, digital-logic, gates, logic, nand, puzzle, schematic, scripting, xor
LicenseAll rights reserved
Average durationA few minutes
LanguagesEnglish
InputsKeyboard, Mouse
Player countSingleplayer

Purchase

Buy Now3.99€ EUR or more

In order to download this game you must purchase it at or above the minimum price of 3.99€ EUR. You will get access to the following files:

DLS v0.11.2 Setup (Win x64).exe 9 MB
DLS v0.11.2 (Win x64).zip 2 MB
DLS v0.11.2 (Linux x64).zip 1 MB
DLS v0.11.2 (Mac OS X x64).zip 1 MB

Download demo

Download
DLS v0.10.1 Setup (Win x64).exe (9 MB)
Download
DLS v0.10.1 (Win x64).zip (2 MB)
Download
DLS v0.10.1 (Linux x64).zip (1 MB)
Download
DLS v0.10.1 (Mac OS X x64).zip (1 MB)
Download
DLS v0.10.1 (Linux x64 - GCC 4.9.3).zip (1 MB)

Comments

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(+1)

The tutorial says a bus will output the first non-undefined input, but when it has 2 defined inputs it outputs undefined.

Is this a bug? Because if not I think it should be explained better.

v0.11.1 (Linux)

You are right. I've fixed it in the manual and forgot to fix the tutorial description...

To be more specific: Originally (pre v0.10) if a bus had more than 1 non-Undefined inputs, the output returned an Error value (red wire). On v0.10 I removed all Errors from the build-in components (tri-state buffers with Undefined control pin and the bus), and I thought I should make it work like it's described in the tutorial (first non-Undefined input got forwarded to the output).

But, apparently, I never did the change, so if a bus gets more than 1 non-Undefined input, its output is Undefined.

I'll fix the description for the next release. Sorry for the confusion and thanks for reporting the bug!

PS: Actually I think a bus should behave more like an OR gate, which ignores all Undefined inputs. It should just OR together all defined inputs and return that as the result. But I think this might break some existing circuits, that's why I'm still keeping the current behavior. If you have any thoughts on the subject, I'll be glad to hear them.

Ah alright, thank you :)

(Edited 1 time) (+1)

Trying to solve "Decoding", and I connected A directly to a 3x2 Bus. I get U on output and not the A value. Why is that so?

EDIT: Hmm, I just removed the 3x2 Bus and readded it again. Now it works as expected. Maybe I hit a strange bug...

You are right. There seems to be a bug with the bus component.

Managed to reproduce it so I will most probably be able to fix it. Will upload a new version as soon as possible!

Thanks :)

Hello again,

I just uploaded a new version (0.11.1) which includes this and a couple of other bug fixes.

Thanks again for the report.

Can you do a 32bit version for windows 7?

I'll see what I can do for the next release. Problem is that it's one more build on top of 4, that's why I avoided it till now. If I do a 32-bit Win version I'll also have to do two 32-bit Linux versions :)

Could you do a build for OSX 10.10.5? I can't load the EDA simulator, as it says it requires 10.11

(Edited 1 time) (+1)

Unfortunately I don't own a Mac at the moment. Somebody else is building DLS for me on OS X, so I doubt this is possible. Sorry for that. Hope you'll be able to try it out at some point in the future.

(+1)

No problem, I'll run it in a Linux VM!

(+1)

Awesome game - just got my 8 bit CPU up and running :). Would love to be able to paste into the ROM editor, I want to write a compiler for my CPU but can't deal with writing the instructions manually!

Great! Do you mind sharing your schematic? :)

You are right about the ROM editor. It should support pasting, or some other form of input (e.g. load external files). In case of pasting the problem is the format of the string/data. The problem with loading external files is that a native open file dialog won't work correctly in fullscreen mode, and writing a full file browser with the current GUI is going to be a PITA :)

Until I figure it out, you can work around the issue by using a scripted component for your ROM as I did in the 6502 schematic for the Kernal ROM (https://github.com/jdryg/dls-schematics/tree/maste...). Either extract the component from the schematic or copy/paste the script into a new component. Then, Base64 encode your ROM and paste it into the script. It should work. You can even make your compiler generate the whole script and just paste the output into DLS.

Hope that helps for now. Thanks for the feedback!

Hello again,

I'd like to inform you that in the latest version (0.9.0) I've added the ability to save and load ROM data to/from files.

In case you want to load your program into a ROM, save its byte code into a file with a ".rom" extension and place it inside the "roms" sub-folder (which is located under the current user's DLS data folder). You can then select your file via the ROM editor. Note that in case the ROM's size in bytes doesn't match the selected file size, you'll get a warning mentioning the number of bytes actually loaded.

Depending on your OS, the DLS data folder is located at:

  • Windows: %USERPROFILE%\Documents\DLS
  • Linux: The folder where you extracted the contents of the zip package.
  • OS X: ~/Documents/DLS
If the "roms" folder hasn't been created yet, you can create it manually. Otherwise, save a dummy ROM via the ROM editor, and it will be created automatically for you.
Hope it works better than pasting in the ROM editor. No need to convert your byte code to text. You can use the binary file generated by your compiler directly.

Awesome! Thank you so so much. Sorry for not sending the schematic through yet, just waiting for a free couple of hours to Polish it up. Will let you know how I get on :)

No worries :) I'm just curious to see what other people build with DLS.

The only schematics I've seen are my own and I'm a newbie on the field (still learning as I go, adding stuff to the game I think will help me build more complex circuits easily). That's why any kind of feedback is appreciated!

(Edited 1 time)

./DLS
./DLS: /usr/lib/libstdc++.so.6: version `GLIBCXX_3.4.21' not found (required by ./DLS)

ls /usr/lib/libstdc++.so*
/usr/lib/libstdc++.so /usr/lib/libstdc++.so.6 /usr/lib/libstdc++.so.6.0.20

gcc --version
gcc (GCC) 4.9.3

Can you please tell me which OS (incl. version) you are using in order to try and reproduce the error? I might have to link to libstdc++ statically, but before doing that, I want to see if I can find a better solution.

Also, can you post the output of the following command:

strings /usr/lib/libstdc++.so.6 | grep GLIB

Void Linux its a rolling release so no "version"

GLIBCXX_3.4
GLIBCXX_3.4.1
GLIBCXX_3.4.2
GLIBCXX_3.4.3
GLIBCXX_3.4.4
GLIBCXX_3.4.5
GLIBCXX_3.4.6
GLIBCXX_3.4.7
GLIBCXX_3.4.8
GLIBCXX_3.4.9
GLIBCXX_3.4.10
GLIBCXX_3.4.11
GLIBCXX_3.4.12
GLIBCXX_3.4.13
GLIBCXX_3.4.14
GLIBCXX_3.4.15
GLIBCXX_3.4.16
GLIBCXX_3.4.17
GLIBCXX_3.4.18
GLIBCXX_3.4.19
GLIBCXX_3.4.20
GLIBC_2.3
GLIBC_2.2.5
GLIBC_2.14
GLIBC_2.4
GLIBC_2.18
GLIBC_2.17
GLIBC_2.3.2
GLIBCXX_DEBUG_MESSAGE_LENGTH

do let me know if I can help you with any further information....

Apparently Void seems to be stuck with GCC 4.9.3 (there's no official package for GCC 5.x). Rebuilding DLS with libstdc++ statically linked might help, but, unfortunately, I cannot comment on how long that'll take. I'll inform you once I find some time to work on it.

Sorry for the inconvenience. And thank you for your interest in DLS.

According this thread (https://forum.voidlinux.eu/t/why-is-void-still-using-gcc-4-9-3/420) you might be able to build GCC 5.2 from sources, in case you want to give it a try.

(+1)

...yeah - have you actually built gcc? on gentoo its far from a trivial sized package needing substantial build time not to mention hassle, I'd rather be patient ;)

I forgot to mention that DLS has been built with GCC 5.2.1 (objdump -s --section .comment ./DLS) so you can try to upgrade GCC, if that's an option.

I've uploaded a new package (DLS v0.8.1 (Linux x64 - GCC 4.9.3).zip) with the executable built under Void Linux x64_86 with GCC 4.9.3. Tested it in a VirtualBox VM and it seems to work.

If you happen to test, please report back any problems you might encounter.

seems to work fine, thanks for taking the time.

(+1)

amazing, well done!